CSIS Seminar

Implementation and Assessment of Strong Logic Encryption Techniques

Abstract

The cost of building a new semiconductor fab was estimated to be $5.0 billion in 2015, with large recurring maintenance costs, and sharply increases as technology migrates to smaller nodes. Thus, to reduce the fabrication cost, and for economic feasibility, most of the manufacturing and fabrication is pushed offshore. However, many offshore fabrication facilities are considered to be untrusted, which has raised concern over potential attacks in the manufacturing supply chain. Hence, fabrication in untrusted fabs has introduced multiple forms of security threats from supply chain including that of overproduction, Trojan insertion, reverse engineering, intellectual property theft, and counterfeiting. To prevent the adversaries from such attacks, various countermeasures for hiding and/or locking the functionality of a netlist are proposed. Logic encryption is one of these methods that hides the functionality of an IP by building ambiguity or by implementing post-manufacturing means of control and programmability into a netlist. In this dissertation, I will present cycle-based logic locking for combinational circuits and deep faults locking for encrypting sequential circuits. Then, I will discuss RANE, a framework that we developed for research community to evaluate robustness of their encryption techniques against the state-of-the-art attacks. Zoom Meeting Link: https://gmu.zoom.us/j/97807070569

Speaker Bio

Shervin Roshanisefat is a doctoral candidate in the Electrical and Computer Engineering Department at George Mason University. He holds a Bachelors of Science degree from Azad University and a Master of Science degree from the University of Tehran.